1. Field of the Invention
The present invention relates to an image processing apparatus and, more particularly, to an apparatus for processing an image signal by using a memory.
2. Related Background Art
Hitherto, in the case of storing a video signal into a memory device, in addition to a method of storing the video signal in an RGB format, there is a method of storing the video signal in a luminance and color difference format because it is sufficient to use a small memory capacity. As memory devices, there is known a construction such as a field memory which is used for only an image and for which the reading and writing operations can be executed at a high speed although it is expensive, or a general dynamic random access memory (what is called a DRAM) whose using method is limited although it is cheap.
In the image memory device using the general DRAM, for instance, in the case of processing a digital video signal of eight bits in the depth direction, hitherto, two 1M-bit DRAMs are connected in parallel to thereby obtain a depth of eight bits and two sets of such DRAM pairs are prepared, thereby forming memory devices M.sub.1 and M.sub.2 to store (512.times.512) 8-bit image data. For the luminance data of two pixels, color difference data (R-Y) of one pixel is assigned or color difference data (B-Y) of one pixel is assigned. In one whole field, the signals are sampled so that the number of luminance data coincides with the total number of color difference data (R-Y) and (B-Y). The luminance data of the even-number designated fields and the odd-number designated fields are stored into the memory device M.sub.1. The color difference data (R-Y) and (B-Y) of the even-number designated fields and the odd-number designated fields are dot-sequentially (or line-sequentially) stored into the memory device M.sub.2.
Generally, circuit means called a high speed page mode to read or write data at a high speed is provided for the general DRAM. In such a mode, after a row address has once been set, by merely designating a column address, total 512 data can be sequentially read or written. Therefore, in the conventional apparatus, the number of image data within one horizontal scan period is set to at most 512 and a refreshing operation to hold the data is executed by using a CAS before RAS refreshing cycle for a horizontal blanking period of time.
In the conventional apparatus, since the high speed page mode is limited to 512 pixels, there is a limitation in the number of sampling pixels for one horizontal scan period. However, as the number of horizontal pixels according to the number of vertical pixels, that is, the number of scanning lines, 640 pixels are needed in the case of the NTSC system and 760 pixels are necessary in the case of the PAL system. The number of 512 pixels is merely 67% of that in the case of the PAL system, so that a resolution fairly deteriorates. On the contrary, if it is intended to assure 760 pixels in the horizontal direction, a memory device which can access 1024 (=512.times.2) data at a high speed must be prepared by increasing the number of memories in the horizontal direction, so that the apparatus becomes very expensive.